• 2 Configurable ports (Ports can be configured to operate as one port with expanded GPIO count, or as two independent GPIO ports)
• 1.2 – 3.3V IO operating voltage range, separately controlled for each port.
• Single-ended LVTTL, LVCMOS, HSTL, SSTL and differential (port A only) LVDS, RSDS, PPDS, TMDS signaling standards.
• PLL with up-to 5 different clock generated (optional)
• Max PLL clock rate is TBD
• Independent VIO power supply 0.8-3.3V range and capable supplying up-to 1A per port.
• Independent VEXP voltage regulator with 1.8 – 3.3V VOUT range and capable supplying up-to 150mA per port.
• 5V (VUSB) output
• Field upgradable.
• 4 AUX ADC inputs or up-to 4 AUX GPIO pins (5V signaling).
• 12-bit ADC, single-ended or differential operation, 0.0 – 4.095V range

Compatible software

• Mentor Tessent® SiliconInsight®